Gueorgui Antchev Institute for Nuclear Reseach and Nuclear Energy Bulgarian Academy of Sciences
Dominique Gigi   CERN
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The DPM Prototype 3 (P3) is implemented on a long PCI board form factor.
The main memory is constituted of two DIMM's PC100 (up to 512 Mbytes) where events will be stored. The memory can be accessed through two on-board 
PCI busses. On those busses, extension boards can be plugged to accept one additional 
PMC/PCI boards. A Memory Management Unit (MMU) operates the memory as a hard disk.
The MMU is built with FPGAs and SRAM and can be reconfigured to test many memory management options. 
A third PCI bus is used to control the MMU: this allows the DPM to be plugged on personal computer (PC, SUN, or Macintosh). The third PCI bus is connected to the on-board PCI busses and the MMU through a 4 way PCI bridge (also implemented with
FPGAs). This allows the three PCI busses to work independently from each other at the maximum bandwidth of 524MB/s each.

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In the CMS data acquisition system (DAQ), 
the Dual Port Memory (DPM) is a key element of the Readout unit. 
Its role is the buffering of the incoming events from the Detector 
Dependent Units (DDU) and the transmission of the requested events 
to the Filter Unit through the switch. In the current CMS DAQ 
baseline design the RU I/O main parameters are 400MB/s data input 
bandwidth, 200 MB/s output bandwidth and 100 kHz event handling. 
The new prototype based on reconfigurable hardware and high-speed 
standard busses is presented in this paper.
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