CERN: György Rubin, Pierre Vande Vyvre
MTA-RMKI: Péter Csató, Ervin Dénes, Tivadar Kiss, János Sulyán, László Szendrei
BME: Betalan Eged, Csaba Soós, Dénes Tarján, Norbert Tóth
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The ALICE collaboration has recognised the benefits of standardising the links used for data transmission between the front-end electronics (FEE) and the data-acquisition system (DAQ). The requirements of the different sub-detectors have been collected and summarised in an ALICE Internal Note.

This paper describes the design of the ALICE detector data link (DDL), the current implementation and the results of the tests.

The DDL will interface the FEEs of all the sub-detectors to the read-out receiver cards (RORC) of the DAQ. The complete ALICE DAQ will include hundreds of DDLs.

The first and main usage of the DDL consists of having a source interface units (SIU), connected to the FEEs and placed inside the ALICE detector, a destination interface units (DIU) connected to the RORCs and located in the counting room about 200 meters from the detector. The two DDL interface units are connected through two multi-mode optical fibres.

The second usage of the DDL address the needs of some of the ALICE subsystems (e.g. muon trigger) which will require high-speed bi-directional information transfer between VME crates. The DDL shall also support this working mode, using a DIU and a RORC at both end of the link.

The main data flow will take place from the FEE to the RORC. The DDLs shall transmit in total 2.5 GB/s event data from the FEE to the RORC. Each DDL shall be able to transmit event data at a rate of 100 MB/s with a detected bit error rate of < 10-14. As the zero suppression algorithm requires downloading blocks of data into the FEE, a throughput of 10 MB/s is also needed in the opposite direction.

The FEEs shall be remotely controlled by the RORC through the DDL, since their placement inside the detector will not allow using any other cabling apart from the DDL medium. Therefore, commands and status information shall also be transmitted between the FEE and the RORC.

Since the SIU is located inside the detector, the requirements for the lifetime (> 10 years), the power consumption (< 4 W) and the footprint (< 25 cm2) of this unit are key issues. More strict requirements have been identified for the Inner Tracking System sub-detector where radiation tolerant electronics is needed and the maximum footprint of the SIU shall be less than 15 cm2.

To achieve the high reliability of the experimental apparatus, efficient test of all the sub-systems shall be provided. The DDL shall allow to test the FEE remotely by using JTAG BST. The DDL itself shall also have a powerful built-in self-test mode.

The prototype DIU is implemented as a daughter-board with a size of 50 cm2, power consumption of 5 W and supply voltages of +5 V and +3.3 V. It consists of two subsystems the media interface and the protocol engine. The media interface consists of two main components: a standard 9x1 optical transceiver with duplex SC connector and a VITESSE electrical transceiver. The protocol engine is implemented in two ALTERA programmable logic device (PLD) of FLEX10KA series.

The main aims of prototype SIU development were to decrease the size (25 cm2) and the power consumption (4 W) and to use a single +3.3 V supply voltage. The protocol engine is implemented in a single ALTERA programmable logic device (PLD) of FLEX10KE series (+2.5 V version), having an advanced FineLine BGA package. A new small from factor optical transceiver is used with MT-RJ connector.

The RORC interfaces the DDL to the VME bus. It is implemented as a single width 6U VME64x module. Up to 2 DDL channels can be connected to the prototype RORC. For each DDL channel, the RORC shall provide a 1 MB output buffer for the outgoing data blocks and a 2 MB dual-port input buffer for the event data. The RORC buffers can be read and written through VMEbus by using the MBLT mode.

The DDL and the RORC have been successfully integrated to ALICE test systems. First they were used in the ALICE-TPC test system in DIU-to-DIU configuration, providing bi-directional information transfer between the front-end VME crate and the read-out VME crate over a distance of 50 m. The performance, the protocol, the reliability and the bit error rate of the complete read-out chain (processor -> RORC -> DIU -> DIU -> RORC -> processor) has been tested. Secondly, the DDL and the RORC have been used with DATE software in the lab both in DIU-to-DIU configuration (processor -> RORC -> DIU -> DIU -> RORC -> processor) and in SIU-to-DIU configuration (FEE emulator -> SIU -> DIU -> RORC -> processor). DATE is a data acquisition software package, developed for the ALICE test systems.

A series of hardware and software test tools have also been developed for supporting the first phase of the project (e.g. SIU simulator, FEE emulator).

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In this paper we present the successful accomplishment of the first phase of the ALICE Detector Data Link (DDL) project. This phase includes the prototyping of all the DDL components and the read-out receiver card and also their integration to the ALICE-TPC test system and the DATE software. The test results on the performance and the system reliability will also be shown.

The DDL has been designed to cover all the needs for data transfer between the detector and the data acquisition system. The DDL will be the standard interface between the front-end electronics of all the ALICE sub-detectors and the read-out receiver card of the data-acquisition system. The DDL is a high-speed (Gbit/s) full-duplex multi-purpose fibre optic link that can be used for the bi-directional transmission data blocks and for the remote control and test of the front-end electronics from the data acquisition system.

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