John Huth, John Oliver, Werner Riegler : Harvard University
Eric Hazen, Christoph Posch, Jim Shank : Boston University
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	The ATLAS MDT Muon system consists of approximately 400k channels of Monitored Drift Tubes (MDTs) arranged in Superlayers and Chambers. Each Superlayer consists of  3 to 4 tube deep arrays of MDTs onto which the front end electronics is mounted. The MDTs are 30 mm in diameter and up to 6 meters in length. In order to suppress internal reflections, the far end of each MDT is terminated in its characteristic impedance of 370 ohms. These terminators are mounted on 24 channel pc cards,  the HV Hedgehog cards,  which also serve to distribute high voltage. Front end electronics is mounted on the MDT’s “signal end” on mezzanine cards which further plug into chamber mounted Signal Hedgehog cards. The front end electronics consists of three octal ASDs and a 24 channel TDC for timestamping and communication with the DAQ. 
	This arrangement allows us to develop the front end ASDs and mezzanine cards in several phases. The first phase of ASD development is called ASD-lite. This is a 4 channel CMOS ASD with simplified functionality compared with the final octal ASD called MDT-ASD. Each channel of ASD-lite consists of a preamplifier, a two stage pole/zero shaper optimized for drift gasses with fixed drift time parameter (t0 = 10ns), a discriminator, and an LVDS output driver. The topology of this signal processing chain is pseudo-differential inputs, followed by fully differential internal stages. The function of ASD-lite is to provide test electronics at reasonable cost for use on prototype and early product MDT chambers. At the time of this writing, ASD-lite has been prototyped in the HP 0.5 micron CMOS process and fully tested on chamber along with prototypes of all required hedgehog and mezzanine cards.  All required electrical parameters such as noise, peaking time, discriminator time walk, and input protection against chamber spark discharges have been met. A dedicated wafer run is now under way for fabrication of 10k channels for MDT testing.
	Work on the final MDT-ASD octal device has been underway since early 1999. The primary improvements in this device are the addition of Wilkinson leading edge charge measurement and full on-chip programmability of all adjustable parameters via a simplified serial link. The Wilkinson leading edge charge mode responds to a signal over threshold by firing a gate of typical (programmable) width of 15ns. During this gate, comparable to the peaking time of the shaper output, the signal is integrated onto a holding capacitor, after which it is run down at fixed current. The output signal, sent to the TDC, starts at the leading edge of the pulse and terminates at the trailing edge of the fixed current run-down. Thus the charge in the leading edge of the signal is encoded in the pulse width of the output signal. Extensive simulation work has indicated a significant enhancement to leading edge resolution is obtained by this scheme. 
	On completion of chamber testing, the final MDT-ASD mezzanine cards will replace those containing the ASD-lites. 

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	Development of a CMOS amp/shaper/disc for the ATLAS Muon detector is presented. The first phase of this work has resulted in a simplified 4-channel device (ASD-lite) fabricated in HP 0.5 micron n-well CMOS operating at 3.3 volts. Highly accurate bsim3v3 models resulted in performance which closely matches SPICE predictions. On-chip crosstalk, a parameter not easily simulated,  is measured to be below 0.5%. Results of chip measurements and on-chamber tests will be presented. This device will be used for early testing of ATLAS MTD (Monitored Drift Tube) modules. Further work on the final octal MDT-ASD, which will be fully programmable and include Wilkinson leading edge charge measurement, will be presented. 
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