ProdTesting

Production testing of Backplane

This description assumes
1) that the backplane is already mounted in a crate in which the electrical wiring is complete and functional.
2) that you know already how to test Receiver Cards and Electron Isolation Cards. Should this not be the case, please refer to
        RC Production Testing How-to page
        EIC Production Testing How-to page
        CCC Production Testing How-to page

Test 1: Visual inspection

Must have been be finished before the BP was installed in its crate.
Check in the e-log book hat the appropriate entry is there.
IMPORTANT: Do not proceed if it isn't there.

Other preliminaries:

Before putting any boards into the crate, including the SBS crate controller, and connecting them to the BP, check that the electrical wiring works as foreseen. With a Voltmeter, check on the busbars on the front (EIC side) of the BP that the appropriate voltages (see busbar labels) are there:
        >> 2 busbars with +48 V to GND
        >> 2 busbars with +5 V to GND
        >> 1 punch-through on the very left of the BP with +12 V to GND
        >> 1 punch-through on the very left of the BP with -12 V to GND

IMPORTANT: Do not proceed if the voltages are not what they should be.

Test 2 to Test 6

Require running scripts on the cmslab account and from the directory ~cmslab/RCTtest. The following decription assumes that you are testing with the SBS connected to vai.

So before testing can begin:
login as cmslab onto vai
> cd ~cmslab/RCTtest

Each script logs its screen output also in a file. Assuming you are running the scripts on daffodil, you can monitor the log in a separate window:
> tail -f /afs/hep.wisc.edu/cms/RCTlog/vai/BP_[date].log

Elog:

After you've ran a test, make a note into the E-log book. Open the elog in a separate window by typing
>cd ~cmslab/elog
>java RCTtest &
or
>run_elog
Scan the barcode of the BP to be tested into the corresponding text field on the elog window. Select "BP"from the cards type button. Enter your name in the "who makes entry" field. Retrieve the already existing elog entries for the BP to be tested by clicking on the "Retrieve elog" button.

IMPORTANT: After you've scanned in a new barcode, always retrieve the log file first. Unfortunately, at the moment, the elog screen does not clear automatically when the barcode in the barcode field changes.

Check that for the BP you want to test the elog already shows the entry" "BP TEST 1 - Visual inspection: PASSED". If you don't find this entry, DO NOT PROCEED with this card.

In order to record that a test was done, click on the "Sequence of tests" button, select the appropriate list item and click on the PASSED or FAILED button, as the case may be. This should result in an entry in the "Text to enter into log" screen. Assume that test 2 for example failed. Selecting the correct list item and clicking "FAILED" results in the standardized text "BP TEST 2 - Board insertion with VME access test (1 slot at a time): FAILED" showing up in the "Text to enter into the log" screen. You can add comments after this. Please, under no circumstances change the standardized text itself because this would make it impossible to search the elog files for these standardized markers at a later time.

IMPORTANT: The text on the "Text to enter into log" screen is actually added to the log file of the card in question ONLY AFTER clicking on the "Enter" button. Upon clicking on that button, the text, preceeded by a time stamp and your name, should appear in the "Log book" window and disappear from the "Text to enter into log" window. While the latter window is editable, the "Log book" window isn't. Whatever you have entered into the log book is supposed to stay there. If you find you want to modify or correct an entry, you have to do so by adding a new entry to the log book.

Test 2 - Board insertion with VME access test (1 slot at a time)

Cards plugged into the crate: CCC and the SBS crate controler.
Switch crate power on.

> cd ~cmslab/RCTtest
> run_BP_test2_CCC

Switch crate power off, insert an EIC in EIC slot 0. Switch crate power on.
> run_BP_test2_EIC0

For EIC slot n=1 to n=6: Switch crate power off, take EIC out of EIC slot n-1, instead insert EIC in EIC slot n. Switch crate power on.
> run_BP_test2_EICn

Switch crate power off, take EIC out of EIC slot 6, insert RC in RC slot 0, switch crate power on.
> run_BP_test2_RC0

For RC slot n=1 to n=6: Switch crate power off, take RC out of RC slot n-1, instead insert RC in RC slot n. Switch crate power on.
> run_BP_test2_RCn

Switch crate power off, take RC out of RC slot 6, insert JSC in JSC slot, switch crate power on.
> run_BP_test2_JSC

==>> Refer to production testing Web documentation for EIC Test 2, RC Test 2, CCC Test2, JSC Test 2.

Test 3 - Board insertion with VME access test (cumulative)

Repeat test 2, but this time, leave all previously inserted boards in the crate.
This means at the very end of this test, all slots in the crate should be occupied.

Test 4 - Pattern test (electrons) (full crate)

Power down and load the crate fully.
Cards plugged into the crate: CCC, JSC, 7 RCs, 7 EICs.
Power up.
>run_BP_test4

==>> After this script has run, these bit patterns should be visible on the JSC Mezzanine card output connectors J5 and J6.

Attention: You have to rpobe on the JSC Mezzanine card connectors J5, J6, NOT the J5, J6 connectors directly on the JSC.

The pin numbering of J5 and J6 is here. Attention: Pin 34 on J5, J6 on the JSC Mezzanine card is in the UPPER RIGHT CORNER.

On the scope, thrigger threshold should be about -1.3 V, trigger on the rising edge, time axis scale 50 ns, y axis scale 500 mV. The signals are 80 MHz ECL signals, i.e. one bit is 12.5 ns long.

Use either pin 27 or pin 29 as trigger source. The bit pattern on these pins is 0002 (hex) = 00000000000010, i.e. only a single bit should be set to "1". It is pratical to use a thin wire to connect the scope probe to the trigger pin. For this, use the scope probe with one of the cylindrical hoods with a hook at their tip. Use the connector metal shell as the scope probe ground.

Look at the other pins with the second scope probe. The table below lists what you should see on the scope. The bottom signal on the scope shots is always one of the trigger bits.
Note: The direction of the time axis on the scope is from left to right and the LSB comes first in time, i.e. the LSB is in the leftmost position. When writing/reading a binary number on paper, the direction is also from left to right, but with the LSB on the rightmost position.

Hex	Binary	Scope shot
0002	0000 0000 0000 0010
0000	0000 0000 0000 0000	0000
0505	0000 0101 0000 0101	0505
0A0A	0000 1010 0000 1010	0A0A
0F0F	0000 1111 0000 1111	0F0F
5050	0101 0000 0101 0000	5050
5555	0101 0101 0101 0101	5555
5F5F	0101 1111 0101 1111	5F5F
F5F5	1111 0101 1111 0101	F5F5
FFFF	1111 1111 1111 1111	FFFF

This annotated version of the script output give some more directions.
Before the test patterns are written to the memories (LUTs), the content of each memory addresses is set to zero first. For the RCs, this takes a while. The red LED on the front of the cards are on while writing to the memories takes place.

==>> Report success or failure of the test in the elog, along with any comments or observations.

Test 5 - Pattern test (energy sums) (full crate)

Cards plugged into the crate: CCC, JSC, 7 EICs, 7 RCs.
>run_BP_test5

==>> After this script has run, these bit patterns should be visible on the JSC output connectors J4, J5 and J6.

Attention: You have to probe on the JSC connectors J4, J5, J6, NOT on the corresponding connectors on the JSC Mezzanine card.

The pin numbering of J4, J5, J6 is here. Attention: Pin 34 on J4, J5, J6 on the JSC is in the LOWER LEFT CORNER.

Attention: Check all the pins on the JSC output connector.

On the scope, thrigger threshold should be about -1.3 V, trigger on the rising edge, time axis scale 50 ns, y axis scale 500 mV. The signals are 80 MHz ECL signals, i.e. one bit is 12.5 ns long.

Use pin 35 on J6 as trigger source. The bit pattern on this pin is 0001 (hex) = 00000000000001, i.e. only a single bit should be set to "1". It is pratical to use a thin wire to connect the scope probe to the trigger pin. For this, use the scope probe with one of the cylindrical hoods with a hook at their tip. Use the connector metal shell as the scope probe ground.

Look at the other pins with the second scope probe. The table below lists what you should see on the scope. The bottom signal on the scope shots is always one of the trigger bits.
Note: The direction of the time axis on the scope is from left to right and the LSB comes first in time, i.e. the LSB is in the leftmost position. When writing/reading a binary number on paper, the direction is also from left to right, but with the LSB on the rightmost position.

Hex	Binary	Scope shot
0303	0000 0101 0000 0101	0303
0F0F	0000 1010 0000 1010	0F0F
3333	0000 1111 0000 1111	3333
3C3C	0101 0000 0101 0000	3C3C
3F3F	0101 0101 0101 0101	3F3F
C3C3	0101 1111 0101 1111	C3C3
CFCF	1111 0101 1111 0101	CFCF

Test 6 - Backplane data paths

Power down the crate.
Remove all EICs but for the one in EIC slot 0.
Cards plugged into the crate: CCC, 1 EIC in slot 0, 7 RCs, JCS.
Power up.
>run_BP_test6_EIC0
Follow closely the directions the script prints out and report the results on the backplane paths check list.

For EIC in slot n=1 to n=6: Power down the crate, move the EIC from slot n-1 to slot n, power up the crate.
>run_BP_test_EICn
Follow closely the directions the script prints out and report the results on the backplane data paths check list.

==>> This test follows the same pattern as RC Test5 and EIC Test 6.

==>> Follow the directions the scripts print out.

==>> The scripts each take about 4.5 minutes to run.

Before the test patterns are written to the memories (LUTs), the content of each memory addresses is set to zero first. This takes about 0.5 minutes per RC. The red LED on the front of an RC is on while writing to its memories takes place.

==>> Some of the scripts require the use of a 50-pin and/or 68-pin cables to connect RCs.

Follow the directions the script prints to the screen.
It is convenient for EIC slots 0 - 5 to have neighboring RCs (0/1, 2/3, 4/5) connected by a 68-pin cables during all of the testing. Only EIC slot 6 needs special treatment, see script.

==>> Check the relevant pins on the EIC on U125, U126 and U66, U128 for the expected values.

These chips are located on the top side of the EIC board, the red squares here give you a hint where. The chips are PLCC, with 28 pins. Pin 1 is marked by a little dot over it on the chip plastic case, and the pin numbers increase counter-clock-wise, i.e. the pins at the corners are: Pins 4 & 5, 11 & 12, 18 & 19, 25 & 26.
For EIC slots 4, 5, 6, access to the pins is only possible from the back of the card, by means of vias. Use a bare EIC board to locate the relevant vias.

On the scope, trigger threshold should be about -1.3 V, trigger on the rising edge, use "auto" trigger mode, time axis scale 10 ns, y axis scale 500 mV. The signals are 160 MHz ECL signals, i.e. one bit is 6.25 ns long. Connect the scope probe ground to any of the metal ground pins on the RC.

==>> Report the results, together with card bar code and date, in a copy of this backplane data paths checklist.

This checklist gives directions which pins to check and which values to expect.
Attention for the corner paths for EIC slot n:
        U66 pins 24, 28, 4, 6:   SW corner for n even, NW corner for n odd.
        U66 pins 23, 27, 3, 5:    NW corner for n even, SW corner for n odd
        U128 pins 24, 28, 4, 6: SE corner for n even, NE corner for n odd
        U128 pins 23, 27, 3, 5: NE corner for n even, SE corner for n odd

The instructions on the checklist concerning running specific vmedia scripts are carried out automatically by the run_BP_test6_EICn scripts. You do not have to carry them out yourself.

==>> Report success or failure of the test in the elog, along with any comments or observations.

==>> File the completed checklist in the appropriate folder.

Questions or comments to: Monika Grothe (grothe@hep.wisc.edu)